Introduction to phase-locked loop system modeling

Introduction Phase-locked loops (PLLs) are one of the basic building blocks in modern electronic systems. They have been widely used in communications, multimedia and many other applications. The theory and mathematical models used to describe PLLs are of two types: linear and nonlinear. Nonlinear theory is often complicated and difficult to deal with in real-world designs. Analog PLLs have been well modeled by linear control theory. Starting from a well-defined model in the continuous-time domain, this article introduces a modeling and design method for a digital PLL based on linear control theory. It has been proved that a linear model is accurate enough for most electronic applications as long as certain conditions are met. Figure 1 shows a block diagram of the Texas Instruments THS8083 device that targets LCD monitor and digital TV applications. The task of the PLLs in these devices is to recover the pixel clock based on input reference HS (horizontal sync). This PLL has been accurately modeled by the method introduced in this article. A linear PLL model in the continuous-time domain (S-domain) From Figure 2, the PLL can be easily recognized as a feedback control system. This system consists of the following components. • Phase detector—detects the phase difference between the input signal Fin(t) and the feedback signal Ffeedback(t) • Loop filter—typically, a filter with low-pass characterization • VCO—voltage-controlled oscillator whose output frequency is a function of its input voltage